>Dpu-Mir-96-P2_pre
CUUGGCACUGGAAGAAUUCACAGAGUGCAUUACGACAGGUCGUGGGUUCCCUGGUGCCAGAGA
>Dpu-Mir-96-P2_pri
AUAUGUAGGAAAUUAAAUAUUCCGGUGAUCCUUGGCACUGGAAGAAUUCACAGAGUGCAUUACGACAGGUCGUGGGUUCCCUGGUGCCAGAGAUUGCUCCCGGAAAUCAAUAUCAUCACAAUU
>Dpu-Mir-96-P2_loop
GUGCAUUACGACAGGUC
>Dpu-Mir-96-P2_5p
CUUGGCACUGGAAGAAUUCACAGA
>Dpu-Mir-96-P2_3p*
GUGGGUUCCCUGGUGCCAGAGA